CHERI in SoC Working Group

The CHERI in SoC working group defines what it means for a system-on- chip (SoC) or chiplet-based design to support the CHERI architecture. It provides guidance on the hardware features and integration steps needed to implement capability enforcement at the system level【11095760006714†L149-L168】.

By documenting levels of CHERI support and associated trade‑offs, the group helps silicon vendors and integrators understand the benefits and costs of adopting CHERI. Participants share reference designs, verification strategies and lessons learned when creating CHERI-capable devices【11095760006714†L149-L168】. The working group welcomes participation from hardware architects, verification engineers and toolchain developers.